• Preparing for STA on your design, including investigating and analyzing the clocks that dictate STA results
• Validating inherited PrimeTime run scripts
• Leveraging the latest PrimeTime best practices to create new run scripts
• Identifying opportunities to improve run time
• Performing static timing analysis
• Providing ECO fixing guidance to downstream tools

• Interpret the essential details in a timing report for setup and hold, recovery and removal, and clock-gating setup and hold
• Generate timing reports for specific paths and with specific details
• Generate summary reports of the design violations organized by clock, slack, or by timing check
• Validate, confirm, debug, enhance, and execute a PrimeTime run script
• Create a PrimeTime run script based on seed scripts from the RMgen utility
• Identify opportunities to improve run time
• Create a saved session and subsequently restore the saved session
• Identify the clocks, where they are defined, and which ones interact on an unfamiliar design
• Reduce pessimism using path-based analysis
• Use both a broad automatic flow for fixing setup and hold violations and a manual flow for tackling individual problem paths.

• A basic understanding of digital IC design
• Familiarity with UNIX workstations running X-windows
• Familiarity with vi, emacs, or other UNIX text editors

• Does your design meet timing?
• Objects, Attributes, Collections
• Constraints in a timing report
• Timing arcs in a timing report
• Control which paths are reported

• Summary Reports
• Create a setup file and run script
• Getting to know your clocks
• Analysis types and back annotation

• Additional checks and constraints
• Path-Based Analysis and ECO Flow
• Emerging Technologies and Conclusion